SPI-BUS parameters

1_16_secbus.jpg

 

 

Parameter Description Value

Predefined:

ClockPhase Defines the slope of the clock impulse when the data transfer occurs.
Detailed description
0 = Data transfer with rising edge.
1 = Data transfer with falling edge.
0
ClockPolarity Defines the polarity of the clock signal.

1_16_clkidle.jpg
Detailed description
Low = Idle is low-signal
High = Idle is high signal
low
CSMask Number of the used CS-lines as bit decoded mask.
CS 0 = 0001

CS 1 = 0010
CS 2 = 0100
CS 3 = 1000
and all combinations of it,
for example:
Use of CS1 and CS3 = 0101
or
Use of all 4 possible CS lines =1111
 
Detailed description
 
Input of the decimal value of the dual number:
Verwendete CS-Leitungen Bitmaske Dezimal
zahl
CS0 0001

1

CS0 + CS1 0011

3

CS0 + CS2 0101

5

CS0 + CS3 1001

9

CS0+CS1+CS2 0111

7

CS0+CS1+CS3 1011

11

CS0+CS2+CS3 1101

13

CS0+CS1+CS2+CS3 1111

15

CS1 0010

2

CS1+CS2 0110

6

CS1+CS3 1010

10

CS1+CS2+CS3 1110

14

CS2 0100

4

CS2+CS3 1100

12

CS3 1000

8

1
EClockRate Optional clock impulse frequence for sensors if they need one.
The EClockRate signal is being offered at the 25-pol. SUB-D-connector pin 23.
Direct value entry in [MHz]
from 0,01 to 5 MHz.
2
FirstClockDelay Delay time between activated CS and Clock impulse.
1_16_fcldelay.jpg
 
Detailed description
Direct value entry in [ns].
Only input values, which are multiples of the delay resolution values are valid.
0
LastClockDelay Delay time between last clock an deactivated CS.
1_16_lcldelay.jpg
Detailed description
Direct value entry in [ns].
Only input values, which are multiples of the delay resolution values are valid.
0
MosiClockDelay Delay time between clock impulse and MOSI data changel.
1_16_mcldelay.jpg
Detailed description
Direct value entry in [ns].
Only input values, which are multiples of the delay resolution values are valid.
0
Parity Definition of the kind of error detection.
Following variations are available:
  • Parity (even/odd)
  • CRC (including configuration)
  • No error detection

Detailed description

 
OFF=No error detection
EVEN= Even parity-error detection
ODD=Odd parity-detection
CRC=CRC error detection
(The configuration of the CRC-error detection is done at the parameter section CRC-Configuration)
Off
SpiClockRate Frequence of the clock impulse in MHz
Detailed description
Direct value input in [MHz] from 0,01 to 20 MHz. 2
SpiMode Selection of the SPI protocol
Detailed description
Inframe or outframe Inframe